Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design
The integration of hybrid computational intelligence techniques into the Layered Encoding Cascade Optimization (LECO) model is driven by a balanced approach, combining exploration through Genetic Algorithm (GA) for broader solutions and focused local search employing Particle Swarm Optimization (PSO...
Published in: | 2024 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2024 |
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2-s2.0-85201314576 Fadzal N.; Fadzal A.N.; Kamarulzaman N.H.; Omar S.; Ahmad N. Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design 2024 2024 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2024 10.1109/ISIEA61920.2024.10607197 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85201314576&doi=10.1109%2fISIEA61920.2024.10607197&partnerID=40&md5=64c15fb08732b84015fff42d041de4ac The integration of hybrid computational intelligence techniques into the Layered Encoding Cascade Optimization (LECO) model is driven by a balanced approach, combining exploration through Genetic Algorithm (GA) for broader solutions and focused local search employing Particle Swarm Optimization (PSO). In this model, a distinct external layer introduces a layer encoding structure with multi-resolution capabilities. This structure enables GA functions for integral value individuals, while conducting PSO functions for real-valued individuals as potential solutions. To estimate the efficacy of the GA-PSO LECO model, a specific study involving the design of a two-stage amplifier circuit is carried out. Results indicate that the GA-PSO LECO model surpasses existing APLAC built-in optimization methods, achieving a minimum on S (1,1) and S (2,2) at the same time, simultaneously maximizing dB [S (2,1)] to 16.469 dB from the two-stage amplifier circuit. © 2024 IEEE. Institute of Electrical and Electronics Engineers Inc. English Conference paper |
author |
Fadzal N.; Fadzal A.N.; Kamarulzaman N.H.; Omar S.; Ahmad N. |
spellingShingle |
Fadzal N.; Fadzal A.N.; Kamarulzaman N.H.; Omar S.; Ahmad N. Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
author_facet |
Fadzal N.; Fadzal A.N.; Kamarulzaman N.H.; Omar S.; Ahmad N. |
author_sort |
Fadzal N.; Fadzal A.N.; Kamarulzaman N.H.; Omar S.; Ahmad N. |
title |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
title_short |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
title_full |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
title_fullStr |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
title_full_unstemmed |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
title_sort |
Hybrid Layered Encoding Cascade Optimization Model in Two-Stage Amplifier Circuit Design |
publishDate |
2024 |
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2024 IEEE Symposium on Industrial Electronics and Applications, ISIEA 2024 |
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doi_str_mv |
10.1109/ISIEA61920.2024.10607197 |
url |
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85201314576&doi=10.1109%2fISIEA61920.2024.10607197&partnerID=40&md5=64c15fb08732b84015fff42d041de4ac |
description |
The integration of hybrid computational intelligence techniques into the Layered Encoding Cascade Optimization (LECO) model is driven by a balanced approach, combining exploration through Genetic Algorithm (GA) for broader solutions and focused local search employing Particle Swarm Optimization (PSO). In this model, a distinct external layer introduces a layer encoding structure with multi-resolution capabilities. This structure enables GA functions for integral value individuals, while conducting PSO functions for real-valued individuals as potential solutions. To estimate the efficacy of the GA-PSO LECO model, a specific study involving the design of a two-stage amplifier circuit is carried out. Results indicate that the GA-PSO LECO model surpasses existing APLAC built-in optimization methods, achieving a minimum on S (1,1) and S (2,2) at the same time, simultaneously maximizing dB [S (2,1)] to 16.469 dB from the two-stage amplifier circuit. © 2024 IEEE. |
publisher |
Institute of Electrical and Electronics Engineers Inc. |
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language |
English |
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Conference paper |
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Scopus |
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1809678473199878144 |