Master-Slave Transmission Design for the Serial Asynchronous Protocol

The utilization of the American Standard Code for Information Interchange (ASCII code) has shown to be effective as a standardized means of addressing in the context of asynchronous protocol serial transmission between a personal computer and master-slave devices. Nevertheless, the proposed RS-485 s...

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Bibliographic Details
Published in:2023 IEEE International Conference on Applied Electronics and Engineering, ICAEE 2023
Main Author: Annuar I.; Ahmad N.; Hassan M.M.; Muhammad A.N.; Ispawi D.I.
Format: Conference paper
Language:English
Published: Institute of Electrical and Electronics Engineers Inc. 2023
Online Access:https://www.scopus.com/inward/record.uri?eid=2-s2.0-85180539541&doi=10.1109%2fICAEE58583.2023.10331542&partnerID=40&md5=b68a3974c47e0d2d44bf873396405332
Description
Summary:The utilization of the American Standard Code for Information Interchange (ASCII code) has shown to be effective as a standardized means of addressing in the context of asynchronous protocol serial transmission between a personal computer and master-slave devices. Nevertheless, the proposed RS-485 standard is susceptible to delay time interference caused by extraneous bits during the process of transmitting and receiving data between the master and slave devices. The transmission mode of the RS-485 master device is programmed to have a duration of 940 microseconds, while the reception mode is active for the remaining period until the detection of another start bit, to address the problem. The master-slave system consists of a master unit, two slave units, and a graphical user interface (GUI). This question utilizes the lowercase ASCII character codes w, I, g, and 1. The oscilloscope is employed to capture and document the ASCII character codes transmitted from the personal computer to the master-slave systems. The findings indicate that the microcontroller effectively filtered out any interference bits transmitted by the PC. The objective of the developed system is to mitigate interference problems in asynchronous serial transmission by enhancing the precision of the asynchronous address data transmitted from a personal computer (PC) to master-slave devices. © 2023 IEEE.
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DOI:10.1109/ICAEE58583.2023.10331542