Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform
Fully Homomorphic Encryption (FHE) has gained wide attention in cloud security as it allows computation on encrypted data. However, it requires a huge key size, resulting in impractical execution time. In this paper, we proposed an FHE hardware accelerator employing Weighted-Number Theoretic Transfo...
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Penerbit Akademia Baru
2023
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2-s2.0-85163107680 Hashim S.; Benaissa M. Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform 2023 Journal of Advanced Research in Applied Sciences and Engineering Technology 30 3 10.37934/araset.30.3.362371 https://www.scopus.com/inward/record.uri?eid=2-s2.0-85163107680&doi=10.37934%2faraset.30.3.362371&partnerID=40&md5=08cb05c1c29a080ef75d608bb5f0f484 Fully Homomorphic Encryption (FHE) has gained wide attention in cloud security as it allows computation on encrypted data. However, it requires a huge key size, resulting in impractical execution time. In this paper, we proposed an FHE hardware accelerator employing Weighted-Number Theoretic Transform (NTT) multiplier. NTT parameters are selected, in a way that the proposed design is executable on Digital Signal Processing (DSP) multiplier, to exploit its high clock rate. As the NTT kernel, is in general form, it can be pre-computed and stored in Look-up Tables (LUTs). The same LUTs are also usable for weight-factor as they both have symmetric periodicity properties. This optimization has saved 70% of LUTs utilization. Next optimization is proposed on reduction within NTT. The special prime moduli are exploited to accomplish a simple operation, where inverse Montgomery multiplication is replaced with shift and subtraction. The proposed optimizations are implemented for FHE encryption and realized on Kintex 7 platform. A magnitude of 93.2% speedup improvement is achieved for Toy, compared to benchmark software implementation. As the proposed design is targeted for full DSP implementation, it achieved a higher clock frequency (249.19 MHz), while consuming lower hardware resources. © 2023, Penerbit Akademia Baru. All rights reserved. Penerbit Akademia Baru 24621943 English Article All Open Access; Hybrid Gold Open Access |
author |
Hashim S.; Benaissa M. |
spellingShingle |
Hashim S.; Benaissa M. Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
author_facet |
Hashim S.; Benaissa M. |
author_sort |
Hashim S.; Benaissa M. |
title |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
title_short |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
title_full |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
title_fullStr |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
title_full_unstemmed |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
title_sort |
Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform |
publishDate |
2023 |
container_title |
Journal of Advanced Research in Applied Sciences and Engineering Technology |
container_volume |
30 |
container_issue |
3 |
doi_str_mv |
10.37934/araset.30.3.362371 |
url |
https://www.scopus.com/inward/record.uri?eid=2-s2.0-85163107680&doi=10.37934%2faraset.30.3.362371&partnerID=40&md5=08cb05c1c29a080ef75d608bb5f0f484 |
description |
Fully Homomorphic Encryption (FHE) has gained wide attention in cloud security as it allows computation on encrypted data. However, it requires a huge key size, resulting in impractical execution time. In this paper, we proposed an FHE hardware accelerator employing Weighted-Number Theoretic Transform (NTT) multiplier. NTT parameters are selected, in a way that the proposed design is executable on Digital Signal Processing (DSP) multiplier, to exploit its high clock rate. As the NTT kernel, is in general form, it can be pre-computed and stored in Look-up Tables (LUTs). The same LUTs are also usable for weight-factor as they both have symmetric periodicity properties. This optimization has saved 70% of LUTs utilization. Next optimization is proposed on reduction within NTT. The special prime moduli are exploited to accomplish a simple operation, where inverse Montgomery multiplication is replaced with shift and subtraction. The proposed optimizations are implemented for FHE encryption and realized on Kintex 7 platform. A magnitude of 93.2% speedup improvement is achieved for Toy, compared to benchmark software implementation. As the proposed design is targeted for full DSP implementation, it achieved a higher clock frequency (249.19 MHz), while consuming lower hardware resources. © 2023, Penerbit Akademia Baru. All rights reserved. |
publisher |
Penerbit Akademia Baru |
issn |
24621943 |
language |
English |
format |
Article |
accesstype |
All Open Access; Hybrid Gold Open Access |
record_format |
scopus |
collection |
Scopus |
_version_ |
1809677583040643072 |