Multichannel Microstimulating SoC

• Published in: Handbook of Biochips: Integrated Circuits and Systems for Biology and Medicine
• Main Author: Noorsal E.; Xu H.; Sooksood K.; Ortmanns M.
• Format: Book chapter
• Language: English
• Published: Springer New York 2022
• Online Access: https://www.scopus.com/inward/record.uri?eid=2-s2.0-85153838603&doi=10.1007%2f978-1-4614-3447-4_18&partnerID=40&md5=784f5d1b7b1c44f3049fa1b2d415cc23

In recent years, limited research was focused on designing a multichannel microstimulator that could demonstrate high flexibility in terms of pulse parameters, waveshapes, stimulation strategy, number of electrodes, high-voltage compliance, and variety of charge-balancing techniques to optimize the use of an implant chip for various implementations, changing operating conditions, or research on stimulation efficiency. The reason for this is that designing a highly flexible multichannel stimulator that could fulfill all the different neural applications while concurrently maintaining low power and area consumptions is not a trivial task. Normally, there is a trade-off between high flexibility and hardware complexity. For neural applications, including neuromuscular, cochlear implant, and deep brain stimulators, which require a small number of electrodes, high flexibility of waveform pattern at each stimulation site is not an issue. However, especially for a large number of electrodes, such as a retinal implant, having high flexibility in the waveform pattern is not easy to implement. Therefore, this chapter presents an overview of design and implementation of flexible multichannel microstimulator in system on chip (SoC). Firstly, the importance of having high flexibility in neural stimulator application and the trade-off between high flexibility and hardware complexity are discussed. Secondly, the state of the art of flexible waveform generation, charge-balancing techniques for safe stimulation, and power management requirements in multichannel microstimulators are reviewed. Thereafter, the examples of overall design architecture, stimulation protocols, flexible stimulation, and functionality for a multichannel epiretinal stimulator ASIC with 1024 electrodes are provided. In addition, an area- and power-efficient stimulator front-end circuit which covers the HV current driver, compliance monitor, and several types of charge-balancing techniques are further elucidated. Finally, a power management circuit with closed-loop power control and dynamic supply adaptation for multichannel epiretinal stimulator is explained in detail. A 16-channel epiretinal microstimulator has been developed and successfully tested in a 0.35 µm AMS HVCMOS technology. © Springer Science+Business Media, LLC, part of Springer Nature 2022.